6502 - Part 2 Reset and Clock Circuit

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6502 Retro Console Part 2

Add a Reset and Clock Circuit

In Part 1 we powered up the 6502 and watched it running a NOP test with just the CPU and LEDs on the address bus.

Now we’ll give it a clock and a clean start every time you power on, rather than relying on a function generator. In this post we will cover a simple 555 Timer Clock circuit and reset circuit.

555 Timer

The 6502 needs a steady pulse on its Φ0 (pin 37) to step through instructions. A NE555 timer is perfect for low-speed testing reliable, simple, and easy to wire.

Parts List

  • NE555 timer

  • 1 kΩ resistor

  • 10 kΩ resistor

  • 100 nF capacitor (timing)

  • 0.1 µF capacitor (decoupling)

  • Breadboard + jumper wires

Circuit Diagram


How to Wire It


Add a 0.1 µF decoupling cap across the +5V and GND rails stability.

Typical speed: ≈ 7–10 kHz perfect for a visible NOP test.
Use larger resistors or capacitors to slow it down.

Tip: Swap the timing capacitor for 1 µF and the 10 kΩ for 100 kΩ to step slowly enough to watch each address LED change.

Reset Circuit

When the 6502 first powers on, it needs a brief RESET pulse, a signal that starts low, then goes high after a short delay.
This ensures the CPU always begins from a known address instead of jumping into random instructions, which can happen if the RESET line is floating or noisy.

Parts List

  • 1 × 10 kΩ resistor

  • 1 × 100 nF capacitor

  • 1 × Momentary push-button

  • A few jumper wires

Circuit Diagram

Wiring

Connect the +5V rail to the 10 kΩ resistor then onto Pin 40 of the 6502 IC.
Connect GND to the 100 nF capacitor. Then other side of the capacitor between the 10 kΩ resistor and Pin 40 of the 6502 IC
Connect GND to one side of the push button, then the other side to Pin 40 of the 6502 IC

How It Works

The 6502’s RESET (pin 40) expects an active-low signal which means:

  • When LOW (0 V)  the CPU is held in reset (paused)

  • When HIGH (+5 V)  the CPU starts running

The simple RC timing circuit makes this automatic so that when power is applied:

  1. The capacitor (100 nF) starts uncharged, so it pulls RESET low through its GND connection.

  2. The resistor (10 kΩ) slowly charges the capacitor toward +5 V.

  3. After a short delay (a few milliseconds), the voltage at RESET rises to logic HIGH due to the capacitor being charged.

  4. The CPU sees that as “OK to start running”.

Typical Reset Timing

With 10 kΩ and 100nF, the CPU resets for about 1–2 milliseconds after power-up.
If your circuit still seems unstable at start-up, increase the capacitor to 220 nF or 470 nF for a slightly longer reset pulse. To calculate times, check out my capacitors and timing blog post.

Result: every time you power up or tap the button the 6502 resets predictably and begins executing from address $FFFC, just as it should.

Next Up

In Part 3, we’ll add ROM using an AT28C256 EEPROM. This will allow you to load your first program and see real code run on the bus.


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